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solrize ,

Chapter from “Security Engineering” (2nd ed) about physical tamper resistance:

www.cl.cam.ac.uk/~rja14/Papers/SEv2-c16.pdf

It’s been ages since I read it so idr how much of it was at chip level. Really high end stuff have the secure chips in a tamper reactive enclosure so it’s difficult to get to them without first erasing the contents. The chapter discusses that ;).

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